RISC-V Assembly Syntax Quiz

This quiz assesses your understanding of RISC-V assembly syntax based on the provided overview.

Section 1: Multiple Choice (15 Questions)

Instructions: Choose the best answer for each question.

1. How many integer registers does the base RISC-V architecture define?
   a) 16
   b) 32
   c) 64
   d) 8

2. Which register is hard-wired to the value zero?
   a) x1 (ra)
   b) x2 (sp)
   c) x0 (zero)
   d) x8 (s0/fp)

3. What is the primary purpose of the ra (x1) register?
   a) Stack Pointer
   b) Global Pointer
   c) Return Address
   d) Frame Pointer

4. Which instruction format type typically uses two source registers (rs1, rs2) and one destination register (rd)?
   a) I-type
   b) S-type
   c) R-type
   d) J-type

5. The ADDI instruction belongs to which format type?
   a) R-type
   b) I-type
   c) S-type
   d) U-type

6. Which instruction is used to load a 32-bit word from memory?
   a) LB
   b) LH
   c) LW
   d) SW

7. Which instruction format is primarily used for conditional branches?
   a) R-type
   b) S-type
   c) B-type
   d) U-type

8. The LUI (Load Upper Immediate) instruction is an example of which format type?
   a) I-type
   b) U-type
   c) J-type
   d) R-type

9. What does the JAL instruction typically do in addition to jumping to a label?
   a) Stores the current PC in sp
   b) Stores the return address (PC+4) in ra (x1)
   c) Stores the content of rs1 in rd
   d) Loads a value from memory

10. Which instruction performs a logical left shift using an immediate value?
    a) SLL
    b) SRLI
    c) SLLI
    d) SRAI

11. The SB instruction stores how many bits from the source register to memory?
    a) 32 bits
    b) 16 bits
    c) 8 bits
    d) 64 bits

12. Which pseudo-instruction is often used to move the value of one register to another (e.g., mv rd, rs)?
    a) ADDI rd, rs, 0
    b) SUB rd, rs, zero
    c) OR rd, rs, zero
    d) XOR rd, rs, rs

13. In B-type instructions, how is the branch target address calculated?
    a) PC + sign_ext(Imm12)
    b) rs1 + sign_ext(Imm12)
    c) PC + sign_ext(2 * Imm12)
    d) rs1 + rs2

14. Which instruction loads a byte from memory and zero-extends it?
    a) LB
    b) LBU
    c) LH
    d) LHU

15. What is the purpose of the JALR instruction?
    a) Jump to a label and link (store return address)
    b) Jump based on a register value and link (store return address)
    c) Perform a conditional jump based on register comparison
    d) Load a register value from an address calculated using another register

Section 2: True/False (15 Questions)

Instructions: Determine if the following statements are true or false.

1. True/False: The zero register (x0) can be written to by instructions like ADDI.

2. True/False: R-type instructions include a 12-bit immediate value.

3. True/False: The SLT instruction performs an unsigned comparison.

4. True/False: SRAI performs an arithmetic right shift, preserving the sign bit.

5. True/False: S-type instructions are used to load data from memory into registers.

6. True/False: The immediate value in B-type instructions represents a byte offset.

7. True/False: LUI loads the immediate value into the lower 20 bits of the destination register.

8. True/False: The JAL instruction has a jump range of +/- 1 MiB.

9. True/False: The pseudo-instruction J LABEL is equivalent to JAL zero, LABEL.

10. True/False: JALR uses the J-type instruction format.

11. True/False: Initializing a 32-bit constant always requires exactly two instructions (LUI and ADDI).

12. True/False: Multiplying by 4 can be achieved using SLLI with a shift amount of 2.

13. True/False: The BEQ instruction branches if the values in rs1 and rs2 are not equal.

14. True/False: The sp register (x2) is typically saved by the caller function.

15. True/False: LW rd, offset(rs1) calculates the memory address by adding offset to the value in rs1.

Section 3: Free Response (10 Questions)

Instructions: Provide short answers or code snippets for the following questions.

1. Explain the difference between SRA and SRL instructions.

2. Write the two RISC-V instructions needed to load the 32-bit constant 0xDEADBEEF into register t0.

3. What is the difference between the LB and LBU instructions?

4. Write a RISC-V instruction to add the contents of register s1 and s2 and store the result in s0.

5. Explain the purpose of the func3 and func7 fields in R-type instructions.

6. Write a RISC-V instruction to store the 32-bit value in register a0 to the memory address contained in register sp.

7. What does the pseudo-instruction JR ra typically accomplish?

8. Write a sequence of RISC-V instructions to implement the C code if (a == b) a = a + 1; assuming a is in t0 and b is in t1.

9. Describe the roles of the rs1, rs2, and rd fields in an R-type instruction.

10. Explain how the JAL and JR ra (or JALR x0, 0(ra)) instructions work together to implement function calls.

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